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| 1. general description the pca9522 is a monolithic bipolar integrated circuit for bus buffering in applications including i 2 c-bus, smbus, etc. it includes hot inser tion logic for detecting stop and idle conditions, making it ideal fo r live insertion into backplanes. the buffer extends the bus load limit by buffering both the scl and sda lines. the pca9522 is a drop-in replacement for the ies5502, with only the maximum bus voltage reduced from 15 v to 10 v. hot insertion logic allows the ic to be plugged into live backplanes without causing data corruption on the bus. the open-collect or ready signal (rdy) indicates when the connection has been made. precharging of th e backplane ports minimizes disruptions to the bus during hot insertion. the enable function allows sections of the bus to be isolated. individual parts of the system can be brought on-line su ccessively. bus level translation between a very wide range of bus voltages, from 1.8 v to 10 v, is supported. these features provide enormous flexibility in interfacing systems of differen t technologies, operat ing speeds and loads. the unique operation of the pca9522 provides one of the fastest response times of such bidirectional buffers. it does this without the need for rise-time accelerators which, combined with low noise margins, ma y cause glitches outside of the i 2 c-bus specification. 2. features and benefits ? dual, bidirectional unity gain isolating buffer ? hot insertion logic prevents data and clock bus corruption for live backplane applications ? pre-charge minimizes data corruption on live insertion ? supports i 2 c-bus (standard-mode and fast-mode), smbus (standard and high power modes) and pmbus ? open-collector ready output (rdy) ? fast switching times allow op eration in excess of 1 mhz ? enable (en) allows bus segments to be disconnected ? low current standby mode when not enabled ? high-impedance ports when ic unpowered ? 6 ma (static) pull-down capability ? low noise susceptibility ? supports the connection of several buffers in series ? level shift bus voltages from 1.8 v to 10 v pca9522 fast dual bidirectional bus buffer with hot insertion logic rev. 1 ? 28 september 2011 product data sheet
pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 2 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 3. applications ? backplane management/interconnect ? telecommunications systems including atca ? desktop and portable computers including raid 4. ordering information 5. block diagram table 1. ordering information type number topside mark package name description version PCA9522D pca9522 so8 plastic small outline package; 8 leads; body width 3.9 mm sot96-1 PCA9522Dp 9522 tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm sot505-1 fig 1. block diagram of pca9522 pca9522 1en sclb sdab 3 6 sclc sdac 2 7 v cc 8 4 gnd 1.8 v to 10 v 2.7 v to 5.5 v r5 scl sda 1.8 v to 10 v r1 r2 scl sda enable (up to 10 v) 002aaf318 backplane side precharge hot insert logic undervoltage v ref rdy5 card side 1.8 v to 10 v r3 r4 ready pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 3 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 6. pinning information 6.1 pinning 6.2 pin description [1] card side is equivalent to scl_out / sda_out. [2] backplane side is equivalent to scl_in / sda_in. fig 2. pin configuration for so8 fig 3. pin configuration for tssop8 PCA9522D en v cc sclc sdac sclb sdab gnd rdy 002aaf319 1 2 3 4 6 5 8 7 PCA9522Dp en v cc sclc sdac sclb sdab gnd rdy 002aaf320 1 2 3 4 6 5 8 7 table 2. pin description symbol pin description en 1 enable sclc 2 scl buffer, card side [1] sclb 3 scl buffer, backplane side [2] gnd 4 supply ground rdy 5 ready sdab 6 sda buffer, backplane side [2] sdac 7 sda buffer, card side [1] v cc 8 positive supply pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 4 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 7. functional description refer to figure 1 ? block diagram of pca9522 ? . 7.1 v cc , gnd ? supply pins the pca9522 can be driven from voltage supplies ranging from 2.7 v to 5.5 v. the threshold level below which the output will begin to match the input is 33 % of v cc . hence, the operating voltage should be chosen with the required bus voltage, switching threshold, and noise margins in mind. 7.2 sclb, sclc, sdab, sd ac ? buffer inputs/outputs the two open-collector buffers (scl and sda) are identical and symmetrical. the buffers can be driven from either direction, with the same buffering response. however, the hot insertion logic is determined from the ?backp lane? (sxxb) sides of the buffers. when the one side (e.g., sxxb) of the buffer is being driven low (<0.3v cc ) by another device on the bus, the ot her side (e.g., sxxc) will be driven low by the ic to provide the buffered output. the ?control? or ?input? side is determined by the lowest externally driven signal. therefore if the ?input? is ex ternally pulled to v sxxb = 250 mv, and the ?output? is externally pulled to v sxxc = 500 mv, the buffer will pull the ?output? down further such that it becomes v sxxc =v sxxb +v offset . should the ?output? subsequently become lower than the ?input? by means of an external device pulling it low (v sxxc pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 6 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 9. characteristics table 4. characteristics t amb = ? 40 ? c to +85 ? c; voltages are specified with respect to ground (gnd). symbol parameter conditions min typ max unit power supply v cc supply voltage operating 2.7 - 5.5 v i cc supply current operating; v cc =v i(en) =5.5v - 9 - ma standby; v cc =5.5v; v i(en) = 0 v - 520 - ? a start-up circuitry v th(uvlo) undervoltage lockout threshold voltage v cc =v i(en) =5.5v - 2.2 - v v pch precharge voltage v sxxb floating; v cc =3.3v; v i(en) >1.2v -0.92-v i pch precharge current v sxxb floating; v cc =3.3v; v i(en) >1.2v -11- ? a v th threshold voltage logic input - 0.5v cc -v logic output - 0.5v cc -v buffer ports (sclb, sclc, sdab, sdac) v bus bus voltage - - 10 v v th(il) low-level input threshold voltage --0.3v cc v v th(ih) high-level input threshold voltage 0.41v cc --v i il low-level input current drive current; v bus pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 7 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic [1] guaranteed by design (not subject to test), except for t idle at v cc =3.3v. t idle idle time v bus =v i(en) =v cc =3.3v 5095150 ? s v bus =v i(en) =v cc =5.5v 5075120 ? s t d(enh-rdyoff) delay time from en high to rdy off -95- ? s t d(enl-rdyon) delay time from en low to rdy on -1.1- ? s t d(rdyh-i2con) delay time from rdy high to i 2 c on -1- ? s t d(rdyl-i2coff) delay time from rdy low to i 2 c off - ? 0.5 - ? s table 4. characteristics ?continued t amb = ? 40 ? c to +85 ? c; voltages are specified with respect to ground (gnd). symbol parameter conditions min typ max unit t amb =25 ? c; v bus(in) = 200 mv. fig 4. timing parameters fig 5. offset voltage, v o ? v i fig 6. supply current versus temperature 002aaf324 t f t d v bus 33 % v cc time 70 % v sxxb 30 % v sxxb sxxb sxxc v sxxb v sxxc 50 75 25 100 125 v offset (mv) 0 r pu (k) 010 8 46 2 002aaf325 v cc = v pu = 5 v 8.0 8.8 9.6 i cc (ma) 7.2 t (c) ?50 150 100 050 002aaf326 v cc = 5.5 v 3.3 v pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 8 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 10. application information 10.1 design considerations figure 7 shows a typical application for the pc a9522. the ic can level shift between various bus voltages, without the need for ad ditional external components. higher bus voltages and currents outside the range of the standard i 2 c-bus specification can be catered for, provid ing a longer range capability and higher noise immunity. the enable pin (en) can be used to interfac e buses of different operating frequencies. when enabled, the bus frequency is limited to the maximum 100 khz of the slave device. when disabled, the slave is isolated, and th e remaining bus can be run at 400 khz. the timing performance and current sinking capability will allow it to run well in excess of the 400 khz maximum limit of the fast-mode i 2 c-bus. figure 8 shows the pca9522 used in a backplane application. peripheral cards and backplanes operating at a range of voltages can be interfaced together using a minimum of components. in this example, cards are ru nning at 1.8 v and 3.3 v, while the backplane is at 5 v. cards operating buses between 1. 8 v and 10 v can be catered for in the same system. each card can be safely isolated from the system by disabling the pca9522 at the interface to the backplane. the hot insertion logic on the pca9522 protects against corrupted or truncated data transmissions on start-up of buffer operations. fig 7. pca9522 typical buffer application bus master 400 khz u1 v cc scl sda r1 600 r7 18 k sclc sdac 1.8 v en u2 pca9522 v cc 3.3 v c1 0.01 f sclb sdab r3 3.9 k r4 3.9 k 10 v 10 v backplane or cable run sclb sdab en u3 pca9522 v cc 5 v c2 0.01 f sclc sdac r5 1.1 k r6 1.1 k scl sda u4 v cc 3.3 v slave 100 khz 002aaf321 rdy r2 600 rdy pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 9 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic an ideal backplane application for the pca9522 is the advanced telecom computing architecture (advancedtca) as shown in figure 9 . the pca9522 is well-suited to placement on ?field replaceable units? (frus) used in either a conventional fully-bused arrangement (not shown) or in the low cost, high noise margin radial architecture example as shown in figure 10 . it is fully interoperable with existing systems and components. if required, figure 10 shows a simple low-cost circuit for use at the shelf manager for accelerating the rise in bused systems. in each of these examples, the buffers are intended to extend total system capacitance above 400 pf, so anticipate high capacitance on each side. when loading on one side is small, adding 47 pf is suggested to avoid any waveform ripple, should it occur. fig 8. pca9522 backplane application r3 1.1 k r7 6.8 k sclc sdac en u1 pca9522 v cc (3.3 v) c2 0.01 f sclb sdab 002aaf322 rdy r4 1.1 k card supply gnd peripheral card 1 r5 600 r8 3.6 k sclc sdac en u2 pca9522 v cc (1.8 v) c2 0.01 f sclb sdab rdy r6 600 card supply gnd peripheral card n backplane r1 1.5 k r2 1.5 k v cc (5 v) scl sda gnd (3.3 v) (3.3 v) pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 10 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic the system shown here uses fe t switches, however a valid alte rnative is to simply use 24 ? pca9521s without fet switches. long track runs on the shmc board and backplane can sometimes re sult in high frequency tuned circuits on either side of the pca9521. if your layout is prone to forming such tuned circuits, it is perfectly acceptable to use a ?traditional? damping resi stor (rd) across the pca9521. (1) rra = rise rate accelerator. fig 9. pca9522 used in an advancedtca application in conjunction with the pca9521 backplane 002aaf289 pca9522 p required v il = 0.3v cc (max.) = 0.99 v r fru with switching levels compliant with the i 2 c-bus standard fet switches to shmc #2 v max = 0.5 v (picmg3.0) r enables pca9521 rd rra (1) r pca9522 r v ol = v i + 0.08 v v i p fully bused compliant plug-in (hot-insert) shmc module (e.g., amc) pca9521 rd 12 pca9521 isolating bus buffers p r i 2 c-bus alternate implementations pca9521 rd pca9521 rd fet switches r enables example of existing frus built to picmg3.0 r2.0 buffer with rta p required v il = 0.6 v (typ.) r to shmc #2 etc. shmc1 shmc2 ipmb ( 24) total 12 fet switches (4 / pkg.), giving 24 bus outputs fig 10. discrete rise rate ac celerator circuit example 002aaf323 dtc124e (or equivalent) 10 k 1.5 k sda bc857bs or equivalent 47 k 1 k 22 pf 3.3 v 10 k 1.5 k bc857bs or equivalent 47 k 1 k 22 pf scl pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 11 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 10.2 input to output of fset voltage calculation the offset voltage between the side acting as the output (s xxx(out)) and the side acting as the input (sxxx(in)) of the pca9522 can be calculated using the relationship given in equation 1 : (1) this calculation is valid for v sxxx(in) ? 200 mv, as below this point the saturation voltage of the open-collector output driv e transistor will begin to affect the characteristic. input and output voltages are shown in millivolts, v bus (the supply voltage to the bus) is in volts, and r is in ohms. an example calculation for v bus =3.3v, v sxxc = 200 mv, the resistance r pulling up sxxb is 2 k ? , then the voltage on sxxb is typically: (2) this can be compared with the offset characteristic shown in figure 5 . v offset v i 50 mv v bus r ------------ ?? ?? 11 ? ++ = v sxxb 200 mv 50 mv 3.3 2000 ----------- - ?? ?? 11 268 mv = ? ++ = pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 12 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 11. package outline fig 11. package outline sot96-1 (so8) unit a max. a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 0.25 dimensions (inch dimensions are derived from the original mm dimensions) notes 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. 1.0 0.4 sot96-1 x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 4 5 pin 1 index 1 8 y 076e03 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.05 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.01 0.041 0.004 0.039 0.016 0 2.5 5 mm scale so8: plastic small outline package; 8 leads; body width 3.9 mm sot96-1 99-12-27 03-02-18 pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 13 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic fig 12. package outline sot505-1 (tssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.45 0.25 0.28 0.15 3.1 2.9 3.1 2.9 0.65 5.1 4.7 0.70 0.35 6 0 0.1 0.1 0.1 0.94 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.7 0.4 sot505-1 99-04-09 03-02-18 w m b p d z e 0.25 14 8 5 a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm sot505-1 1.1 pin 1 index pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 14 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 12. handling information 13. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 13.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 13.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering caution this device is sensitive to electrostatic di scharge (esd). observe precautions for handling electrostatic sensitive devices. such precautions are described in the ansi/esd s20.20 , iec/st 61340-5 , jesd625-a or equivalent standards. pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 15 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 13.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities 13.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 13 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 5 and 6 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 13 . table 5. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 6. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 16 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 14. abbreviations msl: moisture sensitivity level fig 13. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 7. abbreviations acronym description amc advanced mezzanine cards atca advanced telecommunications computing architecture esd electrostatic discharge fru field replaceable unit i 2 c-bus inter-integrated circuit bus ic integrated circuit ipmb intelligent platform management bus picmg pci industrial computer manufacturers group pmbus power management bus raid redundant array of independent discs rta rise time accelerator shmc shelf management controller smbus system management bus pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 17 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 15. references [1] um10204, i 2 c-bus specification and user manual ? , rev 03, 19 june 2007; nxp b.v. www.nxp.com/documents/user_manual/um10204.pdf [2] system management bus (smbus) specification ? version 2.0, august 3, 2000; sbs implementers forum. 16. revision history table 8. revision history document id release date data sheet status change notice supersedes pca9522 v.1 20110928 product data sheet - - pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 18 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from competent authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification. pca9522 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2011. all rights reserved. product data sheet rev. 1 ? 28 september 2011 19 of 20 nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. 17.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com nxp semiconductors pca9522 fast dual bidirectional bus buffer with hot insertion logic ? nxp b.v. 2011. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 28 september 2011 document identifier: pca9522 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 4 7.1 v cc , gnd ? supply pins . . . . . . . . . . . . . . . . . 4 7.2 sclb, sclc, sdab, sdac ? buffer inputs/outputs . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.3 enable (en) ? activate buffer operations . . . . 4 7.4 ready (rdy) ? buffer connected indicator . . . 5 7.5 start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10 application information. . . . . . . . . . . . . . . . . . . 8 10.1 design considerations . . . . . . . . . . . . . . . . . . . 8 10.2 input to output offset voltage calculation . . . . 11 11 package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 12 handling information. . . . . . . . . . . . . . . . . . . . 14 13 soldering of smd packages . . . . . . . . . . . . . . 14 13.1 introduction to soldering . . . . . . . . . . . . . . . . . 14 13.2 wave and reflow soldering . . . . . . . . . . . . . . . 14 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 15 13.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 15 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 17.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 17.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 18 contact information. . . . . . . . . . . . . . . . . . . . . 19 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 |
Price & Availability of PCA9522D
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